Resistive switching memory (RRAM) is based on the fact that the resistance of its material can be reversibly switched between high and low resistance states. There are mainly two basic structures: metal-insulator-semiconductor (M-I-S) and metal-insulator-metal (M-I-M). Resistive switching memory has been widely used in the industry and paid extensive attention in academia due to its simple structure, good compatibility with conventional CMOS processes, low set current, low power consumption, compatibility with logic processes, and the ability of mass storage of three-dimensional (3D) stacks. Many research institutes and companies have invested in relating research. In order to meet the requirements of greater data storage density and faster access to information, the current international orientation for the future development of RRAM is ultra-high-density storage. The 3D integration technology is the inevitable choice for ultra-high-density storage.
The three-dimensional resistive switching memory crossbar array is one of the most competitive candidates for future non-volatile memory integration technologies. In order to compete against the three-dimensional NAND flash memory with ultra-high integration density, it is necessary to deeply understand various physical effects in the operation process. In general, in the three-dimensional integration of RRAM devices, a selective device unit is required in series on the RRAM device to suppress the leakage current in the array integration. The 1D1R structure (D: represents a diode and R represents a resistive switching device) has great potential for application in 3D integrated arrays due to its simple program/erase operations and easy fabrication. A 1D1R type resistive switching memory cell generally has unipolar resistive switching characteristics (i.e., set and reset operations are at the same voltage polarity), and its reset process is dominated by Joule heating effect. In order to promote the practical use of the 1D1R three-dimensional integrated array, it is necessary to conduct detailed studies on the thermal conductivity and conductance effects of the device. Since the word/bit lines generally have extremely high thermal conductivity in the array integration, the thermal crosstalk effect is one of the key issues to be considered in the integration of three-dimensional cross arrays of RRAM devices.
There have already been many reports on the Joule heating effect of RRAM devices, but all of current works are at the level of a single RRAM device, not considering diode selective device in array integration yet. In addition, due to the difficulty of experimentally measuring the thermal effects during the 3D integration of resistive switching memories, the conventional thermal analysis methods are difficult to perform. Therefore, there are few reports on the thermal effects and thermal crosstalk of three-dimensional resistive switching memories, and the relevant technical measures have yet to be further resolved.